CMOS Charge-Domain Global Shutter Pixel IP

In-pixel charge transfer to a storage gate has become the standard architecture for global shutter CMOS image sensors. We offer a more advantageous solution to traditional global shutter pixel technology, employing a charge-domain based photo diode storage and readout.

Pixel structure

The principle architecture of our Global Shutter pixel structure, as shown in Figure 1, uses three closely spaced buried channel gates. An in-pixel charge transfer gate (TX) transfers the signal from the pinned photodiode to the charge memory node TS at the end of the exposure. This structure allows large charge storage density. At readout, the TS gate is pulsed low, while the TRa/b is put at a high potential to ensure full transfer to the floating diffusion.

This charge transfer process is shown in Figure 2. To ensure full charge transfer and low dark current in the storage region, the TX/TS/TR gates are buried channel devices. The peak potential under the storage area is around 50nm below the silicon interface. The overflow gate (AB) controls start of exposure for pipelined exposure during readout and acts as lateral anti-blooming drain by preventing that excess charge overflows to the charge storage region.

Improved shutter efficiency

For global shutter pixels, shutter efficiency is a key performance parameter. This is the ratio between the light sensitivity of the storage node and the photodiode.
Our design uses heavily optimized substrate dopant profiles in the photodiode and storage gate region to ensure a minimum charge diffusion to other regions. To further improve parasitic light sensitivity the pixel uses a light waveguide, and a tungsten light shield with sidewall, shown in Figure 3 and 4, to achieve a shutter efficiency of over 32 600:1 (90 dB) and linear full well charge of > 24 000 e- on 5.6 μm pitch.

Available IP offerings

Our charge-domain Global Shutter pixel IP offerings include pixel sizes from 5.6 downto 2.8 um. A sample table with our CD GS pixel IP availability is shown below:

Parameter	Pixel performance
Pixel pitch	5.6 µm	5.0 µm	3.6 µm	2.8 µm
Full well charge	20,000 e-	20,000 e-	17,000 e-	12,000 e-
Read noise	7.3 e- RMS	7.3 e- RMS	7.3 e- RMS	7.3 e- RMS
Shutter efficiency	32 600:1 -90 dB	15000:1 -84 dB	7500:1 -78 dB	3500:1 -71 dB
Conversion gain	71 µV/e-	71 µV/e-	71 µV/e-	71 µV/e-
FPN	0.13% RMS	TBA	TBA	TBA
PRNU	1.5% RMS	TBA	TBA	TBA
Dark current (60 °C)	222 e-/s	253 e-/s	190 e-/s	190 e-/s
Dark current memory node (60 °C)	2532 e-/s	2405 e-/s	1709 e-/s	1430 e-/s

Please contact us to request more information on out Global Shutter Pixel IP technology and offerings.