We have completed a number of custom image sensor design projects which are sole owned by our customers, some examples are shown below. Feel free to enquire us for a custom sensor integrated in your future camera system.
High-Speed Linescan Sensor for Material Inspection
- Monochrome linescan sensor with 8k pixels resolution
- Global shutter
- High-speed, ADC scalable max-13-bit, min 6-bit. Read noise 2.5 e-
- Power efficient drawing 3.5W at full-speed dual-line readout
- Bit-serial sub-LVDS output at 1 Gbps per lane
3K 1500 fps Global Shutter CMOS Image Sensor with Flexible Readout Modes
- Charge-domain global shutter
- Rolling-shutter capable for interlacing
- HDR mode with over 96 dB dynamic range
- Low shutter PLS of > 105 dB
- 1500 fps at full resolution
- Charge-domain binning
- 10-bit high-speed ADC, reconfigurable to 8-bit and 6-bit
- Bit-serial sub-LVDS at 1 Gbps per lane
- Power consumption 2W at full-speed
0.6 Megapixel Global Shutter CMOS Image Sensor for Medical Imaging
- 20um pixel pitch, global shutter
- 200 to 1Me- FW
- 60 fps
- 10-bit column-parallel ADC
- DVP output
Low-area 0.3 Megapixel Readout IC for Pixel Development (Rolling and Global shutter)
- Low-area, 640×640 resolution
- 12-bit chip-global ADC
- Flexible input pixel control
- Multi-slope pixel control
- Bit-parallel DVP output
- Compatible with Teradyne CIS wafer testers
SXGA 30 fps Global and Rolling Shutter ROIC
- 1280 x 1024 pixels
- Flexible resolution control
- 12-bit column-parallel ADC with in-column PGA
- Flexible input pixel control
- Multi-slope pixel control
- Bit-parallel DVP output
- Compatible with Teradyne CIS wafer testers
12-bit Column-Parallel ADC, 66uW/column, 1.5 MSPS
- Switchable resolutions from 6 to 13-bit, and speeds from 0.5 MSPS or less to 2 MSPS.
- Scalable and silicon proven from 1k to 16k channels
- 110 nm CMOS technology, column pitch 3.8 um to 10 um, silicon proven at 7 um, 5 um and 3.8 um
- Output noise 200 uV RMS at 1.4V input range
- Built-in digital correlated double sampling
- Power consumption including references at 66uW/col at max speed with digital CDS
12-bit 20 MSPS ADC
- Standalone, compact 200um x 200um size.
- 12-bit 20 MSPS conversion rate.
- 450 uV RMS output noise at 1.3 V input range.
- Silicon proven at 110 nm CMOS node, favourable to scaling.
- Power consumption 1 mW
220 Megabit CDR TX-RX communication link
- Paired transmit-receive blocks
- Innovative data processing method
- Digital dual-loop recovery based on PLL and DLL
- Silicon proven over 220 Megabit transfer over >5m plain cable
- 440 Megabit transfer capable with some modifications